? semiconductor components industries, llc, 2009 march, 2009 ? rev. 4 1 publication order number: nud3160/d nud3160 industrial inductive load driver this microintegration part provides a single component solution to switch inductive loads such as relays, solenoids, and small dc motors without the need of a free ? wheeling diode. it accepts logic level inputs, thus allowing it to be driven by a large variety of devices including logic gates, inverters, and microcontrollers. features ? provides robust interface between d.c. relay coils and sensitive logic ? capable of driving relay coils rated up to 150 ma at 12 v, 24 v or 48 v ? replaces 3 or 4 discrete components for lower cost ? internal zener eliminates need for free ? wheeling diode ? meets load dump and other automotive specs ? pb ? free packages are available typical applications ? automotive and industrial environment ? drives window, latch, door, and antenna relays benefits ? reduced pcb space ? standardized driver for wide range of relays ? simplifies circuit design and pcb layout ? compliance with automotive specifications gate (1) 10 k 100 k drain (3) source (2) figure 1. internal circuit diagrams gate (2) 10 k 100 k drain (6) source (1) gate (5) drain (3) source (4) 10 k 100 k case 318 case 318f http://onsemi.com marking diagrams sot ? 23 case 318 style 21 jw8 m jw8 = specific device code m = date code = pb ? free package (note: microdot may be in either location) sc ? 74 case 318f style 7 jw8 = specific device code m = date code = pb ? free package (note: microdot may be in either location) jw8 m 1 2 3 1 6 device package shipping ? ordering information NUD3160LT1 sot ? 23 3000/tape & reel NUD3160LT1g sot ? 23 (pb ? free) 3000/tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specification brochure, brd8011/d. nud3160dmt1 sc ? 74 3000/tape & reel nud3160dmt1g sc ? 74 (pb ? free) 3000/tape & reel
nud3160 http://onsemi.com 2 maximum ratings (t j = 25 c unless otherwise specified) symbol rating value unit v dss drain ? to ? source voltage ? continuous (t j = 125 c) 60 v v gss gate ? to ? source voltage ? continuous (t j = 125 c) 12 v i d drain current ? continuous (t j = 125 c) minimum copper, double sided board, t a = 80 c sot ? 23 sc74 single device driven sc74 both devices driven 1 in 2 copper, double sided board, t a = 25 c sot ? 23 sc74 single device driven sc74 both devices driven 158 157 132 ea 272 263 230 ea ma e z single pulse drain ? to ? source avalanche energy (for relay?s coils/inductive loads of 80 or higher) (t j initial = 85 c) 200 mj p pk peak power dissipation, drain ? to ? source (notes 1 and 2) (t j initial = 85 c) 20 w e ld1 load dump pulse, drain ? to ? source (note 3) r source = 0.5 , t = 300 ms) (for relay?s coils/inductive loads of 80 or higher) (t j initial = 85 c) 60 v e ld2 inductive switching transient 1, drain ? to ? source (waveform: r source = 10 , t = 2.0 ms) (for relay?s coils/inductive loads of 80 or higher) (t j initial = 85 c) 100 v e ld3 inductive switching transient 2, drain ? to ? source (waveform: r source = 4.0 , t = 50 s) (for relay?s coils/inductive loads of 80 or higher) (t j initial = 85 c) 300 v rev ? bat reverse battery, 10 minutes (drain ? to ? source) (for relay?s coils/inductive loads of 80 or more) ? 14 v dual ? volt dual voltage jump start, 10 minutes (drain ? to ? source) 28 v esd human body model (hbm) according to eia/jesd22/a114 specification 2000 v thermal characteristics symbol rating value unit t a operating ambient temperature ? 40 to 125 c t j maximum junction temperature 150 c t stg storage temperature range ? 65 to 150 c p d total power dissipation (note 4) sot ? 23 derating above 25 c 225 1.8 mw mw/ c p d total power dissipation (note 4) sc ? 74 derating above 25 c 380 3.0 mw mw/ c r ja thermal resistance, junction?to?ambient minimum copper sot ? 23 sc ? 74 one device powered sc ? 74 both devices equally powered 300 mm 2 copper sot ? 23 sc ? 74 one device powered sc ? 74 both devices equally powered 556 556 398 395 420 270 c/w 1. nonrepetitive current square pulse 1.0 ms duration. 2. for different square pulse durations, see figure 12. 3. nonrepetitive load dump pulse per figure 3. 4. mounted onto minimum pad board.
nud3160 http://onsemi.com 3 electrical characteristics (t j = 25 c unless otherwise specified) characteristic symbol min typ max unit off characteristics drain to source sustaining voltage (i d = 10 ma) v brdss 61 66 70 v drain to source leakage current (v ds = 12 v, v gs = 0 v) (v ds = 12 v, v gs = 0 v, t j = 125 c) (v ds = 60 v, v gs = 0 v) (v ds = 60 v, v gs = 0 v, t j = 125 c) i dss ? ? ? ? ? ? ? ? 0.5 1.0 50 80 a gate body leakage current (v gs = 3.0 v, v ds = 0 v) (v gs = 3.0 v, v ds = 0 v, t j = 125 c) (v gs = 5.0 v, v ds = 0 v) (v gs = 5.0 v, v ds = 0 v, t j = 125 c) i gss ? ? ? ? ? ? ? ? 60 80 90 110 a on characteristics gate threshold voltage (v gs = v ds , i d = 1.0 ma) (v gs = v ds , i d = 1.0 ma, t j = 125 c) v gs(th) 1.3 1.3 1.8 ? 2.0 2.0 v drain to source on ? resistance (i d = 150 ma, v gs = 3.0 v) (i d = 150 ma, v gs = 3.0 v, t j = 125 c) (i d = 150 ma, v gs = 5.0 v) (i d = 150 ma, v gs = 5.0 v, t j = 125 c) r ds(on) ? ? ? ? ? ? ? ? 2.4 3.7 1.8 2.9 output continuous current (v ds = 0.3 v, v gs = 5.0 v) (v ds = 0.3 v, v gs = 5.0 v, t j = 125 c) i ds(on) 150 100 200 ? ? ? ma forward transconductance (v ds = 12 v, i d = 150 ma) g fs ? 400 ? mmho dynamic characteristics input capacitance (v ds = 12 v, v gs = 0 v, f = 10 khz) c iss ? 30 ? pf output capacitance (v ds = 12 v, v gs = 0 v, f = 10 khz) c oss ? 14 ? pf transfer capacitance (v ds = 12 v, v gs = 0 v, f = 10 khz) c rss ? 6.0 ? pf switching characteristics propagation delay times: high to low propagation delay; figure 2, (v ds = 12 v, v gs = 3.0 v) low to high propagation delay; figure 2, (v ds = 12 v, v gs = 3.0 v) high to low propagation delay; figure 2, (v ds = 12 v, v gs = 5.0 v) low to high propagation delay; figure 2, (v ds = 12 v, v gs = 5.0 v) t phl t plh t phl t plh ? ? ? ? 918 798 331 1160 ? ? ? ? ns transition times: fall time; figure 2, (v ds = 12 v, v gs = 3.0 v) rise time; figure 2, (v ds = 12 v, v gs = 3.0 v) fall time; figure 2, (v ds = 12 v, v gs = 5.0 v) rise time; figure 2, (v ds = 12 v, v gs = 5.0 v) t f t r t f t r ? ? ? ? 2290 618 622 600 ? ? ? ? ns
nud3160 http://onsemi.com 4 typical waveforms (t j = 25 c unless otherwise specified) figure 2. switching waveforms load dump pulse not suppressed: v r = 13.5 v nominal 10% v s = 60 v nominal 10% t = 300 ms nominal 10% t r = 1 ? 10 ms 10% figure 3. load dump waveform definition v s t r 90% 10% t v r , i r 10% of peak; reference = v r , i r v out v in 0 v v oh v ih t r t f t plh t phl 50% 90% 50% 10% v ol
nud3160 http://onsemi.com 5 typical performance curves (t j = 25 c unless otherwise specified) figure 4. drain ? to ? source leakage vs. junction temperature figure 5. gate ? to ? source leakage vs. junction temperature figure 6. breakdown voltage vs. junction temperature t j , junction temperature ( c) t j , junction temperature ( c) 75 50 25 0 ? 25 ? 50 0 10 20 30 40 50 80 100 50 25 0 ? 25 ? 50 20 30 40 50 60 70 80 figure 7. output characteristics t j , junction temperature ( c) 125 50 0 ? 25 ? 50 65.0 65.2 65.4 65.8 66.0 66.4 i dss , drain leakage ( a) 125 100 75 125 i gss gate leakage ( a) v gs = 5 v v gs = 3 v 25 100 75 65.6 64.8 bv dss breakdown voltage (v) i d = 10 ma figure 8. transfer function v ds = 60 v figure 9. on resistance variation vs junction temperature v ds , drain ? to ? source voltage (v) 0.7 0.5 0.4 0.3 0.2 0.0 1e ? 03 1e ? 02 1e ? 01 1e+00 1e+01 1e+03 0.1 0.6 0.8 i d drain current (ma) v gs = 5 v v gs = 3 v 60 v gs = 2 v v gs = 2.5 v v gs = 1.5 v v gs , gate ? to ? source voltage (v) 2.6 2.0 1.8 1.6 1.4 1.0 1e ? 07 1e ? 05 1e ? 06 1e ? 04 0.1 1 1.2 2.4 i d drain current (ma) 125 c 2.2 0.001 0.01 85 c 25 c ? 40 c v ds = 0.8 v t j , junction temperature ( c) 75 50 25 0 ? 25 ? 50 800 1200 1600 2000 2400 2800 r ds(on) , drain ? to ? source resistance (m ) 125 100 i d = 0.15 a 3200 v gs = 5.0 v v gs = 3.0 v 70 66.2 1e+02
nud3160 http://onsemi.com 6 typical performance curves (t j = 25 c unless otherwise specified) figure 10. on resistance variation vs. gate ? to ? source voltage figure 11. zener clamp voltage vs. zener current v gs , gate ? to ? source voltage (v) 2.2 1.8 1.6 1.4 1.2 1.0 0 10 20 30 40 50 60 2.0 2.4 i d = 250 a i z , zener current (ma) 10 1.0 0.1 62.0 62.5 63.0 63.5 64.0 64.5 65.0 100 1000 v z zener clamp voltage (v) 70 80 90 100 r ds(on) , drain ? to ? source resistance (m ) 125 c 85 c 25 c ? 40 c 125 c 85 c 25 c ? 40 c 65.5 66.0 2.8 2.6 3.0 66.5 67.0 67.5 68.0 figure 12. maximum non ? repetitive surge power vs. pulse width p w , pulse width (ms) 100 10 0.1 1 10 100 power (watts) 1.0 figure 13. thermal performance vs. board copper area copper area (mm 2 ) 700 500 0 200 400 600 ja ( c/w) 100 200 300 400 600 300 500 sc74 ? 1 sc74 ? 2 sot23 sc74 ? 1 (one device powered) sc74 ? 2 (both devices powered equally) 1 oz. copper, single ? sided board
nud3160 http://onsemi.com 7 figure 14. applications diagram 12 v battery + ? micro processor signal for relay applications information relay, vibrator, or inductive load no nc nud3160 gate (1) 10 k 100 k drain (3) source (2)
nud3160 http://onsemi.com 8 package dimensions style 21: pin 1. gate 2. source 3. drain *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* mm inches scale 10:1 0.8 0.031 0.9 0.035 0.95 0.037 0.95 0.037 2.0 0.079 sot ? 23 (to ? 236) case 318 ? 08 issue an d a1 3 12 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. maximum lead thickness includes lead finish thickness. minimum lead thickness is the minimum thickness of base material. 4. 318 ? 01 thru ? 07 and ? 09 obsolete, new standard 318 ? 08. view c l 0.25 l1 e e e b a see view c dim a min nom max min millimeters 0.89 1.00 1.11 0.035 inches a1 0.01 0.06 0.10 0.001 b 0.37 0.44 0.50 0.015 c 0.09 0.13 0.18 0.003 d 2.80 2.90 3.04 0.110 e 1.20 1.30 1.40 0.047 e 1.78 1.90 2.04 0.070 l 0.10 0.20 0.30 0.004 0.040 0.044 0.002 0.004 0.018 0.020 0.005 0.007 0.114 0.120 0.051 0.055 0.075 0.081 0.008 0.012 nom max l1 h 2.10 2.40 2.64 0.083 0.094 0.104 h e 0.35 0.54 0.69 0.014 0.021 0.029 c
nud3160 http://onsemi.com 9 package dimensions sc ? 74 case 318f ? 05 issue l 23 4 5 6 d 1 e b e a1 a 0.05 (0.002) notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. maximum lead thickness includes lead finish thickness. minimum lead thickness is the minimum thickness of base material. 4. 318f ? 01, ? 02, ? 03 obsolete. new standard 318f ? 04. c l 0.7 0.028 1.9 0.074 0.95 0.037 2.4 0.094 1.0 0.039 0.95 0.037 mm inches scale 10:1 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* h e dim a min nom max min millimeters 0.90 1.00 1.10 0.035 inches a1 0.01 0.06 0.10 0.001 b 0.25 0.37 0.50 0.010 c 0.10 0.18 0.26 0.004 d 2.90 3.00 3.10 0.114 e 1.30 1.50 1.70 0.051 e 0.85 0.95 1.05 0.034 0.20 0.40 0.60 0.008 0.039 0.043 0.002 0.004 0.015 0.020 0.007 0.010 0.118 0.122 0.059 0.067 0.037 0.041 0.016 0.024 nom max 2.50 2.75 3.00 0.099 0.108 0.118 h e ? ? l 0 10 0 10 style 7: pin 1. source 1 2. gate 1 3. drain 2 4. source 2 5. gate 2 6. drain 1 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 nud3160/d microintegration is a trademark of semiconductor components industries, llc (scillc) literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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